search

Oracle CPU-56T Manuel d'utilisateur Page 76

  • Télécharger
  • Ajouter à mon manuel
  • Imprimer
  • Page
    / 145
  • Table des matières
  • DEPANNAGE
    •
  • MARQUE LIVRES
    • Noté. / 5. Basé sur avis des utilisateurs
Vue de la page 75
Devices’ Features and Data Paths Interrupt Controller
76 SPARC/CPU−56T
Interrupt Controller
The UltraSPARC−IIi+ provides a 6−bit wide interrupt vector for 63 interrupt sources.a
The UPA interrupt concentrator (UIC) provides the inputs for all necessary interrupts. It
monitors all interrupts using a round−robin scheme with 33 MHz, converts them to a
device−own vector and transmits this vector to the processor. The PCI interrupts engine
(PIE) reflects every vector in one state bit. From the state bit a new vector is generated and
transmitted to the processor′s execution unit. If more than one interrupt state bit is active,
the transmitting sequence of the new interrupt vector is priority controlled.a
Every interrupt routed to the interrupt controller can be enabled or disabled separately in
the interrupt source and in the processor.
a
Vue de la page 75
1 2 ... 71 72 73 74 75 76 77 78 79 80 81 ... 144 145

Commentaires sur ces manuels

Pas de commentaire
  • Forney Dr. T's Fastest Maxair Applied Energy Products
  • HTC Téléphones mobiles Philips Cadres photo numériques Chicco Jouets REL Acoustics Appareils audio à domicile Sharp Téléphones
  • Rockwell RK2611K2 Sony HDR-CX505VE Black-decker cc800 Makita 1002BA Motorola L6 GSM
  • AEG LF8E8411A Guide de démarrage rapide Samsung SYNCMASTER Manuel de l'utilisateur Sharp ER-A421 Manuel de l'utilisateur Plantronics 66735-01 Fiche technique