Oracle CPU-56T manuels

Oracle CPU-56T Manuel d'utilisateur (145 pages)

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Table des matières

SPARC/CPU−56T

1

Copyright

2

Headquarters

3

4 SPARC/CPU−56T

4

Contents

5

6 SPARC/CPU−56T

6

5 OpenBoot Firmware

7

6 Maps and Registers

8

AppendixA Troubleshooting

9

AppendixB Battery Exchange

9

Product Error Report

10

SPARC/CPU−56T 11

11

12 SPARC/CPU−56T

12

SPARC/CPU−56T 13

13

Using this Guide

14

Abbreviations

15

Revision History

17

Other Sources of Information

19

Safety Notes

20

Installation

21

Power Up

21

Operation

21

Replacement/Expansion

21

RJ−45 Connector

22

Environment

22

Sicherheitshinweise

23

Austausch/Erweiterung

25

RJ−45 Stecker

25

Batterie

25

Umweltschutz

26

Introduction

27

Features

28

Features Introduction

29

SPARC/CPU−56T 29

29

Figure 1: Function Blocks

29

Standard Compliances

30

Ordering Information

31

34 SPARC/CPU−56T

34

Action Plan

35

Requirements

36

Power Requirements

37

Hardware Accessories

38

PMC Modules

39

SPARC/CPU−56T 41

41

2. Remove voltage key

42

Memory Modules

44

Hard Disk

45

SCSI−U160 Cable

45

RS−422 Cable

45

PS/2 Splitter Cable

45

Switch Settings

46

Board Installation

48

Installing the CPU Board

49

Removing the CPU Board

49

Powering Up

50

Installing Solaris

51

Solaris Driver Package

52

SPARC/CPU−56T 55

55

56 SPARC/CPU−56T

56

Front Panel

57

Connectors

59

ETH1_RX+

61

62 SPARC/CPU−56T

62

On−Board Connectors

63

Memory Module

64

Its pinout is given below.a

65

CPU Board

66

SPARC/CPU−56T 67

67

68 SPARC/CPU−56T

68

SPARC/CPU−56T 69

69

70 SPARC/CPU−56T

70

SPARC/CPU−56T 71

71

72 SPARC/CPU−56T

72

Block Diagram

73

74 SPARC/CPU−56T

74

UltraSPARC IIi+ Processor

75

Interrupt Controller

76

PCI Bus A

77

78 SPARC/CPU−56T

78

PCI Bus B

79

SPARC/CPU−56T 81

81

Real−Time Clock and NVRAM

84

Serial Controller

84

SPARC/CPU−56T 85

85

PCI Bus C

86

OpenBoot Firmware

87

OpenBoot

90

VxWorks Support

96

NVRAM Boot Parameters

97

Diagnostics

98

Single Device

99

Group of Devices

99

IDE Devices

100

Displaying System Information

101

Resetting the System

103

Activating OpenBoot Help

104

Maps and Registers

106

SPARC/CPU−56T 107

107

Interrupt Map

108

CPU Internal

109

Physical Memory Map

110

PCI Bus Address Map

111

PCIO−2 Address Map

112

Address: 1FF.F160.0100

116

User LED Control Registers

117

LED Control Register 2

118

Address: 1FF.F160.0110

118

LED Control Register 3

118

Address: 1FF.F160.0112

119

LED Control Register 4

119

Address: 1FF.F160.0113

120

Address: 1FF.F160.0120

120

Watchdog Timer Registers

121

Address: 1FF.F160.0130

122

Address: 1FF.F160.0131

122

Timer Registers

123

Address: 1FF.F160.0144

125

Interrupt Registers

127

Address: 1FF.F160.0180

128

Address: 1FF.F160.0184

128

Reset Register

129

Board Status Registers

130

Address: 1FF.F160.01E1

131

Address: 1FF.F160.01E2

132

Hardware Revision Register

133

I2C Registers

134

Address: 1FF.F160.01FF

135

Troubleshooting

136

Error List

137

Battery Exchange

139

SPARC/CPU−56T 141

141

142 SPARC/CPU−56T

142

SPARC/CPU−56T 143

143

144 SPARC/CPU−56T

144

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